19.6608-mhz clock generator CY26118 preliminary cypress semiconductor corporation ? 3901 north first street san jose ca 95134 408-943-2600 document #: 38-07274 rev. *a revised december 14, 2001 025/0251 features benefits ? integrated phase-locked loop (pll) highest-performance pll tailored for multimedia applications low-jitter, high-accuracy outputs meets critical timing requirements in complex system designs 3.3v operation part number outputs input frequency range output frequencies CY26118 1 15.0000 mhz 19.6608 mhz logic block diagram pin configuration 15.0000 xin xout 19.6608 mhz output divider pll osc q p vco vdd avss avdd vss 8-pin soic CY26118 1 2 3 4 xout xin n/c 19.6608 mhz avss vss vdd 5 6 7 8 avdd
CY26118 preliminary document #: 38-07274 rev. *a page 2 of 5 recommended operating conditions dc electrical characteristics pin summary name pin number description x in 1 15.000 mhz reference crystal input a vdd 2 analog voltage supply n/c 3 no connect av ss 4 analog ground v dd 5 output voltage supply 19.6608 mhz 6 19.6608-mhz clock output v ss 7 output ground x out [1] 8 reference crystal output absolute maximum conditions parameter description min. max. unit v dd supply voltage ? 0.5 7.0 v t s storage temperature [2] ? 65 125 c t j junction temperature 125 c digital inputs v ss ? 0.3 v dd + 0.3 v digital outputs referred to v dd v ss ? 0.3 v dd + 0.3 v electro-static discharge 2000 v parameter description min. typ. max. unit v dd operating voltage 3.0 3.3 3.6 v t a ambient temperature 0 70 c c load max load capacitance 15 pf p max max output power dissipation, 8-pin package 150 c/w f ref reference frequency 15.000 mhz t pu power-up time for all vdd's to reach minimum specified voltage (power ramps must be monotonic) 0.05 500 ms parameter name description min. typ. max. unit i oh output high current v oh = v dd ? 0.5, v dd = 3.3v 12 24 ma i ol output low current v ol = 0.5, v dd = 3.3v 12 24 ma c in input capacitance 7pf i iz input leakage current 5 ma i dd supply current sum of core and output current 20 ma notes: 1. float xout if xin is externally driven. 2. rated for 10 years.
CY26118 preliminary document #: 38-07274 rev. *a page 3 of 5 ac electrical characteristics (v dd = 3.3v) figure 1. duty cycle definition; dc = t 2 /t 1 figure 2. rise and fall time definitions parameter [3] name description min. typ. max. unit dc output duty cycle duty cycle is defined in figure 1 50% of v dd 45 50 55 % t 3 rising edge slew rate output clock rise time 20% - 80% of v dd 0.8 1.8 v/ns t 4 falling edge slew rate output clock fall time 80% to 20% of v dd 0.8 1.8 v/ns t 9 clock jitter peak-to-peak period jitter 200 ps t 10 pll lock time 3ms note: 3. not 100% tested. t 1 t 2 19.6608 mhz 50% t 3 19.6608 mhz 80% 20% t 4 test circuit ordering information ordering code package name package type operating range operating voltage CY26118sc s8 8-pin soic commercial 3.3v 0.1 f av dd 0.1 f v dd clk out c load gnd outputs
CY26118 preliminary document #: 38-07274 rev. *a page 4 of 5 ? cypress semiconductor corporation, 2001. the information contained herein is subject to change without notice. cypress semico nductor corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a cypress semiconductor product. nor does it convey or imply any license unde r patent or other rights. cypress semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected t o result in significant injury to the user. the inclusion of cypress semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in do i ng so indemnifies cypress semiconductor against all charges. pin diagrams 8-lead (150-mil) soic s8
CY26118 preliminary document #: 38-07274 rev. *a page 5 of 5 document title: CY26118 19.6608-mhz clock generator document number: 38-07274 rev. ecn no. issue date orig. of change description of change ** 110764 02/06/02 ckn new data sheet *a 121883 12/14/02 rbi power up requirements added to operating conditions information
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